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BuildMMUConfig.rexx
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OS/2 REXX Batch file
|
2000-07-29
|
15KB
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364 lines
/*********************************************************
** BuildMMUConfig **
** **
** Builds the MMU-Configuration file automatically **
** from the boards information, including kludges for **
** bad or mis-designed hardware **
** Version 1.10 © 2000 THOR-Software, Thomas Richter **
** 29.07.2000 **
** with special thanks to Tobias Abt and Niels Knoop **
** for the Board Ids **
*********************************************************/
PARSE ARG destination p5disable .
if (destination = '') then
destination = '*';
p5 = 1;
if (upper(p5disable) = 'NOP5') then
p5 = 0;
rec = 25;
if (OPEN(.out,destination,'W')) THEN; DO
rv=WRITELN(.out,";*************************************************************************");
rv=WRITELN(.out,";** MMU Configuration file **");
rv=WRITELN(.out,";** **");
rv=WRITELN(.out,";** this file is read on startup by the mmu.library and used to modify **");
rv=WRITELN(.out,";** the pre-calculated or scanned MMU table **");
rv=WRITELN(.out,";** **");
rv=WRITELN(.out,";** © 1999,2000 THOR Software, Thomas Richter **");
rv=WRITELN(.out,";*************************************************************************");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"; the current version of the MMU library knows four commands that can");
rv=WRITELN(.out,"; be used in this file:");
rv=WRITELN(.out,"; CLEARTTX clears all or parts of the transparent translation registers");
rv=WRITELN(.out,"; ADDMEM adds memory to the exec free list pool. BE WARNED, this command");
rv=WRITELN(.out,"; does NOT modify the MMU tables, this must be done manually with");
rv=WRITELN(.out,"; SETCACHEMODE");
rv=WRITELN(.out,"; SETCACHEMODE defines the MMU tables.");
rv=WRITELN(.out,"; DESCRIPTORCACHEINHIBIT defines whether the data cache should be disabled");
rv=WRITELN(.out,"; for the MMU descriptors. It's usually OFF meaning the cache will remain");
rv=WRITELN(.out,"; enabled. This is fine for the mmu.library, but certain hacks might require");
rv=WRITELN(.out,"; an ON argument here. Note that this means more work for the library.");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"ClearTTx ;ignore all TTX registers if any. We don't need them");
rv=WRITELN(.out,"");
rv=WRITELN(.out,";DescriptorCacheInhibit ON ;make access to MMU descriptors cache inhibited");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"");
rv=WRITELN(.out,";Board specific setup follows here,");
rv=WRITELN(.out,";generated by BuildMMUConfig 1.10 © 29.07.2000 THOR-Software");
rv=WRITELN(.out,"");
rv=WRITELN(.out,";General memory setup follows.");
rv=WRITELN(.out,";The following lines are a compatibility kludge for some P5 boards");
rv=WRITELN(.out,";which enable the MMU prior to the 68040/68060 library and leave");
rv=WRITELN(.out,";the memory in CACHEINHIBIT state. You may remove the following");
rv=WRITELN(.out,";lines on all other machines most likely.");
rv=WRITELN(.out,"");
ADDRESS COMMAND "MemModes >T:MemInfo";
IF (OPEN(.meminfo,"T:MemInfo",'R')) THEN; DO
DO UNTIL EOF(.meminfo)
line = READLN(.meminfo);
rv = WRITELN(.out,line);
END;
rv=CLOSE(.meminfo);
END;
rv=WRITELN(.out,";Memory setup end.");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"");
ADDRESS COMMAND "ShowBoards to T:BoardInfo";
IF (OPEN(.boardinfo,"T:BoardInfo",'R')) THEN; DO
rec = 0;
DO UNTIL EOF(.boardinfo)
line = READLN(.boardinfo)
IF line ~= '' THEN; DO
PARSE VAR line 'Type:' type 'Product:' product 'Manufacturer:' mf 'Serial#:' id 'BoardAddr:' from 'BoardSize:' size;
type=X2D(type);
product=X2D(product);
mf=X2D(mf);
id=X2D(id);
dfrom=X2D(from);
dsize=X2D(size);
from=STRIP(from);
size=STRIP(size);
rv=WRITELN(.out,";Setup for board "mf"/"product);
rv=IdentifyBoard(type,product,mf,id,from,size,dfrom,dsize);
rv=WRITELN(.out,"");
END
END
rv=CLOSE(.boardinfo);
END
/* P5 setup kludges follow here..... Sigh */
romlibs = 0; /* libs in ROM? */
IF p5 THEN; DO
ADDRESS COMMAND 'P5Identify'
p5mode = RC; /* Possibly P5 board? */
ADDRESS COMMAND 'FindPort "BOOT-MMU-Port"'
portmode = RC; /* MMU setup kludge? */
ADDRESS COMMAND 'FindResident "ppc.library"'
ppclibmode = RC; /* PPCLib in ROM? */
ADDRESS COMMAND 'FindResident "68060quick.library"'
quicklibmode = RC; /* quick lib in ROM? */
ADDRESS COMMAND 'FindResident "68060.library"'
libmode = RC; /* 060 lib in ROM? */
ADDRESS COMMAND 'FindResident "68040.library"'
lib4mode = RC; /* 040 lib in ROM? */
IF p5mode ~= 0 THEN; DO
p5init = 1
ppccheck = 1
END;
IF ppclibmode = 0 THEN; DO
ppccheck = 1
END;
IF portmode = 0 THEN; DO
ppccheck = 1
p5init = 1
END;
IF (quicklibmode = 0) | (libmode = 0) | (lib4mode = 0) | (ppclibmode = 0) THEN; DO
p5init = 1
romlibs = 1
ppccheck = 1
END;
END; ELSE; DO
p5init = 0
romlibs = 0
ppccheck = 0
END;
IF p5init = 1 THEN;DO
rv=WRITELN(.out,"");
rv=WRITELN(.out,";P5 fixes follow here:");
rv=WRITELN(.out,";If you do not own a P5 board, you may remove the following lines");
rv=WRITELN(.out,";");
rv=WRITELN(.out,";Several P5 boards build a private MMU setup on boot");
rv=WRITELN(.out,";using a kludge called the BOOT-MMU-Port. To run this");
rv=WRITELN(.out,";kludge, the following external command is run from");
rv=WRITELN(.out,";LIBS:mmu/ as all other external commands");
rv=WRITELN(.out,";");
rv=WRITELN(.out,";This command installs also other P5 relevant MMU settings");
rv=WRITELN(.out,";Hence, for P5 boards, please keep it in place even if");
rv=WRITELN(.out,";you *DO NOT* see the BOOT-MMU-Port.");
rv=WRITELN(.out,";");
IF ~EXISTS("LIBS:mmu") THEN; DO
OPTIONS FAILAT 15
ADDRESS COMMAND 'MakeDir >NIL: LIBS:MMU'
OPTIONS FAILAT 10
END;
IF ~EXISTS("LIBS:mmu/P5Init") THEN; DO
ADDRESS COMMAND 'Copy >NIL: P5Init to LIBS:MMU/P5Init'
END;
rv=WRITELN(.out,"P5Init");
rv=WRITELN(.out,"");
rv=WRITELN(.out,"");
END;
IF ppccheck = 1 THEN; DO
ADDRESS COMMAND 'PPCIdentify'
ppccheck = RC;
END;
IF ppccheck = 1 THEN; DO
SAY "The setup script found a P5 board with PPC processor.";
SAY "While not a problem in general, please note that you";
SAY "absolutely *MUST NOT* use the ppc.library together";
SAY "with the mmu.library. This won't work.";
END;
IF romlibs = 1 THEN; DO
rv=WRITELN(.out,"");
rv=WRITELN(.out,";This board has some processor libs resident");
rv=WRITELN(.out,";BPPCFix should be run to remove it.");
rv=WRITELN(.out,";This command has been installed into C:");
rv=WRITELN(.out,";by the setup script.");
SAY "The setup script found some processor libraries resident in ROM";
SAY "You will not be able to use the MuLib specific processor";
SAY "libraries unless you run BPPCFix in your startup-sequence.";
SAY "Please study the BPPCFix manual for details on how to run";
SAY "this program to replace the ROM-based libraries."
SAY "";
SAY "Note further that you *DO NOT* need the ENVARC:MMU-Configuration"
SAY "file if you continue to use the ROM resident libraries.";
SAY "";
IF ~EXISTS("C:BPPCFix") THEN; DO
ADDRESS COMMAND 'Copy >NIL: BPPCFix to C:BPPCFix'
SAY "Copied BPPCFix to C: for convenience...";
END;
END;
rv=WRITELN(.out,"");
rv=CLOSE(.out);
ADDRESS COMMAND 'Delete T:BoardInfo QUIET'
END
EXIT rec
IdentifyBoard: PROCEDURE
PARSE ARG type,product,mf,id,xfrom,xsize,from,size
IF BitExtract(type,5) = '1' THEN; DO
rv=WRITELN(.out,";This board contains memory and requires no special threadment.");
rv=WRITELN(.out,";In case accessing this memory with COPYBACK enabled causes crashes,");
rv=WRITELN(.out,";please remove the semicolon in front of the next line:");
rv=WRITELN(.out,";SetCacheMode FROM 0x"xfrom" SIZE 0x"xsize" CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END; ELSE; DO
z2 = 0
z3 = 0
if (from >= X2D('00200000')) & (from+size <= X2D('00A00000')) THEN; DO
z2 = 1;
END;
if (from >= X2D('10000000')) & (from+size <= X2D('7FFFFFFF')) THEN; DO
z3 = 1;
END;
IF (mf = 18260) & (product = 19) THEN; DO
rv=WRITELN(.out,";Altais");
rv=WRITELN(.out,"For 18260 19 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 18260) & (product = 16) & z3 THEN; DO
rv=WRITELN(.out,";Retina Z3");
rv=WRITELN(.out,"For 18260 16 Z3 SetCacheMode FROM {base+0x00c00000} SIZE 0x00400000 CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2117) & (product = 3) THEN; DO
rv=WRITELN(.out,";Merlin");
rv=WRITELN(.out,"For 2117 3 SetCacheMode FROM {base+0x00c00000} SIZE 0x00200000 CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2181) & (product = 0) & (size >= X2D('00100000')) & z2 THEN; DO
rv=WRITELN(.out,";oMniBus");
rv=WRITELN(.out,"For 2181 0 BIG SetCacheMode FROM {base+0x00c00000} SIZE 0x00200000 CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2092) & (product = 33) & z3 THEN; DO
rv=WRITELN(.out,";Graffity Z3");
rv=WRITELN(.out,"For 2092 33 Z3 SetCacheMode FROM {base+0x00c00000} SIZE 0x00200000 CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2092) & (product = 33) & z2 THEN; DO
rv=WRITELN(.out,";Graffity Z2");
rv=WRITELN(.out,"For 2092 33 Z2 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2167) & (product = 1) & z2 THEN; DO
rv=WRITELN(.out,";Domino");
rv=WRITELN(.out,"For 2167 1 Z2 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2167) & (product = 11) THEN; DO
rv=WRITELN(.out,";Picasso II");
rv=WRITELN(.out,"For 2167 11 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2167) & (product >= 21) & (product <= 24) THEN; DO
rv=WRITELN(.out,";Picasso IV");
rv=WRITELN(.out,";The PIV is too flexible in its design to allow a fixed MMU setup");
rv=WRITELN(.out,";but the P96 software will care about this board anyhow.");
sp = 1;
END;
IF (mf = 2193) & (product = 1) THEN; DO
rv=WRITELN(.out,";GVP Spectrum");
rv=WRITELN(.out,"For 2193 1 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2195) & (product = 5) THEN; DO
rv=WRITELN(.out,";Piccolo");
rv=WRITELN(.out,"For 2195 5 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2195) & (product = 10) & z2 THEN; DO
rv=WRITELN(.out,";Piccolo-SD64 Z2");
rv=WRITELN(.out,"For 2195 10 Z2 SetCacheMode FROM {base} SIZE {size} CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 2195) & (product = 10) & z3 THEN; DO
rv=WRITELN(.out,";Piccolo-SD64 Z3");
rv=WRITELN(.out,"For 2195 10 Z3 SetCacheMode FROM {base} SIZE 0x00400000 VALID IOSPACE CACHEINHIBIT NONSERIAL IMPRECISE");
sp = 1;
END;
IF (mf = 8512) & (product = 34) & z3 THEN; DO
sp = 1;
rv=WRITELN(.out,";CyberVision Z3");
rv=WRITELN(.out,"For 8512 34 Z3 SetCacheMode FROM {base} SIZE {size} BLANK IOSPACE");
rv=WRITELN(.out,"For 8512 34 Z3 SetCacheMode FROM {base} SIZE 0x01400000 VALID IOSPACE CACHEINHIBIT");
rv=WRITELN(.out,"For 8512 34 Z3 SetCacheMode FROM {base+0x01400000} SIZE 0x00c00000 VALID IOSPACE CACHEINHIBIT NONSERIAL IMPRECISE");
rv=WRITELN(.out,"For 8512 34 Z3 SetCacheMode FROM {base+0x02000000} SIZE 0x02000000 VALID IOSPACE CACHEINHIBIT");
END;
IF (mf = 8512) & (product = 67) THEN; DO
sp = 1;
rv=WRITELN(.out,";CyberVision3D");
rv=WRITELN(.out,"For 8512 67 SetCacheMode FROM {base} SIZE {size} BLANK IOSPACE");
IF Z2 THEN; DO
rv=WRITELN(.out,"For 8512 67 Z2 SetCacheMode FROM {base} SIZE 0x00380000 VALID IOSPACE CACHEINHIBIT NONSERIAL IMPRECISE");
rv=WRITELN(.out,"For 8512 67 Z2 SetCacheMode FROM {base+0x00380000} SIZE 0x00080000 VALID IOSPACE CACHEINHIBIT");
END; ELSE; DO
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x04000000} SIZE 0x01000000 VALID IOSPACE CACHEINHIBIT NONSERIAL IMPRECISE");
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x05000000} SIZE 0x00010000 VALID IOSPACE CACHEINHIBIT");
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x05800000} SIZE 0x00008000 VALID IOSPACE CACHEINHIBIT");
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x07000000} SIZE 0x00008000 VALID IOSPACE CACHEINHIBIT");
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x08000000} SIZE 0x00001000 VALID IOSPACE CACHEINHIBIT");
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x0C000000} SIZE 0x00010000 VALID IOSPACE CACHEINHIBIT");
rv=WRITELN(.out,"For 8512 67 Z3 SetCacheMode FROM {base+0x0C0E0000} SIZE 0x00001000 VALID IOSPACE CACHEINHIBIT");
END
END;
IF (mf = 2145) & (product = 33) THEN; DO
sp = 1;
rv=WRITELN(.out,";Rainbow III");
rv=WRITELN(.out,"For 2145 33 SetCacheMode FROM {base} SIZE {size} BLANK IOSPACE");
rv=WRITELN(.out,"For 2145 33 SetCacheMode FROM {base} SIZE 0x00400000 VALID IOSPACE CACHEINHIBIT");
END;
IF (mf = 8512) & (product = 100) THEN; DO
sp = 1;
rv=WRITELN(.out,";MK-III SCSI Hostadapter");
rv=WRITELN(.out,"For 8512 100 SetCacheMode FROM {base} SIZE {size} VALID IOSPACE CACHEINHIBIT");
END;
IF (mf = 8512) & (product = 110) THEN; DO
sp = 1;
rv=WRITELN(.out,";Blizzard PPC SCSI Hostadapter");
rv=WRITELN(.out,"For 8512 110 SetCacheMode FROM {base} SIZE {size} VALID IOSPACE CACHEINHIBIT");
END;
IF (sp = 0) THEN; DO
rv=WRITELN(.out,";no special care has been taken for this board.");
END;
END
RETURN 0
;
; The AREXX BITTST function seems to be broken. We implement our own
;
BitExtract: PROCEDURE
PARSE ARG num,bit
bit=SUBSTR(C2B(D2C(num)),8-bit,1);
RETURN bit
;
; ARexx uses floating point addition and causes a mess about it when
; converting this back to integer. Therefore, we use another approach for
; adding numbers.
; Luckely, boards are aligned...
Add: PROCEDURE
PARSE ARG base,offset
offset = LEFT(offset,LENGTH(offset)-2)
base = LEFT(base,LENGTH(base)-2)
base = D2X(X2D(offset)+X2D(base))'00'
RETURN base